this is not really a bug with bt3 rather than a bug in qemu.

This patch adds virtual FIFO exhaustion into the qemu device model. Not my work but I've shifted it about and rewrote the later part to match the qemu current svn version.

It stops the serial errors that you may encounter running qemu on bt3

Well here it is ...

Code:
diff --git a/hw/serial.c b/hw/serial.c
index b1bd0ff..c902792 100644
--- a/hw/serial.c	2009-02-27 00:44:39.916097290 +0000
+++ b/hw/serial.c	2009-02-26 23:35:12.865102039 +0000
@@ -79,6 +79,7 @@
 #define UART_LSR_OE	0x02	/* Overrun error indicator */
 #define UART_LSR_DR	0x01	/* Receiver data ready */
 #define UART_LSR_INT_ANY 0x1E	/* Any of the lsr-interrupt-triggering status bits */
+#define MAX_BURST 512
 
 /* Interrupt trigger levels. The byte-counts are for 16550A - in newer UARTs the byte-count for each ITL is higher. */
 
@@ -126,6 +127,7 @@
     CharDriverState *chr;
     int last_break_enable;
     int it_shift;
+    int burst_len;
     int baudbase;
     int tsr_retry;
 
@@ -144,6 +146,11 @@
     struct QEMUTimer *modem_status_poll;
 };
 
+static void serial_clear_burst(SerialState *s)
+{
+    s->burst_len = 0;
+}
+
 static void serial_receive1(void *opaque, const uint8_t *buf, int size);
 
 static void fifo_clear(SerialState *s, int fifo)
@@ -221,6 +228,8 @@
     int speed, parity, data_bits, stop_bits, frame_size;
     QEMUSerialSetParams ssp;
 
+    serial_clear_burst(s);
+
     if (s->divider == 0)
         return;
 
@@ -507,6 +516,9 @@
                 ret = s->rbr;
                 s->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
             }
+            if (s->burst_len < MAX_BURST) {
+	        s->burst_len++;
+	    }
             serial_update_irq(s);
             if (!(s->mcr & UART_MCR_LOOP)) {
                 /* in loopback mode, don't receive any data */
@@ -523,6 +535,7 @@
         break;
     case 2:
         ret = s->iir;
+            serial_clear_burst(s);
             s->thr_ipending = 0;
         serial_update_irq(s);
         break;
@@ -534,6 +547,10 @@
         break;
     case 5:
         ret = s->lsr;
+        if (s->burst_len >= MAX_BURST)
+            ret &= ~(UART_LSR_DR|UART_LSR_BI);
+        if (!(ret & UART_LSR_DR))
+            serial_clear_burst(s);
         /* Clear break interrupt */
         if (s->lsr & UART_LSR_BI) {
             s->lsr &= ~UART_LSR_BI;
Also I'm currently trying to port some of bt3's tools over to mips if anybodies interested ?? PM me.